Introducing MSTcad™
By Robert Mears, Atomera Founder and CTO
I have previously described how MST® can facilitate “precision doping profiles,” which are “frozen” or “anchored” in place and do not smear out after subsequent oxidations and anneals. MST does this by blocking some of the common dopant diffusion mechanisms in silicon. This unique attribute enables higher peak mobility, reduced mismatch, and improved gate oxide integrity.
While these benefits are clearly advantageous, the integration of MST into existing silicon has to consider the changes to the dopant diffusion.
Since most devices have been carefully optimized based on normal silicon diffusion, MST cannot simply be “dropped in” to an existing design: the various implant and diffusion (anneal) steps have to be re-optimized. Up to now, this has meant that an MST integration typically involves several “learning cycles” as the dopant implants are re-optimized. Inevitably, these cycles take considerable time and money, both for Atomera and the potential customer.
Enter MSTcad™.
The silicon industry increasingly relies on computer-aided design (CAD) tools, all the way from transistor CAD, or TCAD, through SPICE circuit simulation and various designs for manufacturing DFM tools.
For the last couple of years, Atomera has partnered with Synopsys ($SNPS) to bring MST’s unique attributes into Synopsys Sentaurus™ suite of design tools.
Capturing the MST mechanisms has taken years of careful simulation and calibration, and some limited beta testing with prospective customers, but the code has now reached a level of maturity that Atomera has declared v1.0 and named the code MSTcad™.
MSTcad™ can now be used to predict both the threshold voltage and a variety of electrical characteristics of a new MST device design. While manufacturers will still want to see “proof” in terms of actual silicon, MSTcad™ enables various “what-ifs” to be investigated and a much more targeted integration to be executed. Atomera expects that MSTcad™ will make MST more accessible to a range of device designers, while shortening the required cycle for taking MST through to qualification.