- Researchers at Notre Dame University find 2.7x lower gate leakage and 23% improvement in mobility.
- Company confirms recent data on its Q=quantum engineered material
- Atomera’s MST is currently being evaluated by foundries and integrated device manufacturers.
LOS GATOS, Calif., July 23, 2018 – Atomera (NASDAQ: ATOM), a semiconductor materials and intellectual property licensing company focused on deploying its proprietary technology into the semiconductor industry, today announced recent data confirming significant improvements in high-K/metal gate transistors incorporating Mears Silicon Technology (MST®) a patented, quantum-engineered material that enhances transistors to deliver significantly better performance in today’s electronics.
As semiconductor scaling challenges continue to grow, collaborative research efforts between industry and academia to overcome them must increase. A recent paper presented at the 2018 Device Research Conference (DRC), which was sponsored by the IEEE and Materials Research Society (MRS), detailed Atomera’s architectural and material innovations that includes oxygen-inserted layers in silicon, sometimes also referred to as (OI) silicon, in planar high-K/metal gate (HKMG) devices.
HKMG was introduced by the semiconductor industry to reduce gate leakage and enable further transistor scaling and is the gate technology of choice for the newest technology nodes that are in production and under development today.
The work was done in conjunction with Prof. Suman Datta’s research group at the University of Notre Dame. Prof. Datta worked for Intel for many years, as a principal engineer in the research and development of HKMG and Tri-gate (FinFET) transistors. He was recognized by Intel with the 2003 Intel Achievement Award (highest technical honor at Intel) for “developing the world’s first high-K/metal gate CMOS transistors with record setting performance”.
The DRC paper confirmed the high-field mobility enhancement and gate-leakage reduction of MST (OI) devices relative to a HKMG baseline and presented temperature-dependent transport data supporting the reduction of phonon scattering in MST devices. A mobility enhancement of 23% and a reduction in inversion gate leakage by a factor of 2.7x was reported. Prof. Datta comments, “This significant work is an independent confirmation of the benefits of Atomera’s technology. The mobility improvement and 2.7x gate leakage reduction is expected to facilitate planar transistor scaling”.
Atomera’s MST is currently being evaluated by foundries and integrated device manufacturers. To schedule a meeting please contact: email@example.com
MST Technology Details
Mears Silicon Technology is a patented, quantum-engineered material which is able to enhance transistors to deliver significantly better performance in today’s electronics. That means consumer electronics, such as mobile phones can have longer battery life, IOT devices can be made smaller, and cloud computing will become even more powerful.
Manufacturers can address their yield, power and performance challenges at a fraction of the cost of alternative approaches. Atomera breathes new life into semiconductor fabs by providing up to a full node of performance benefits to existing fab processes enabling significantly better performance in today’s electronics. Atomera’s patented material technology enables more efficient and better controlled current flow, leading to dramatic improvements in device performance and power efficiency.
Atomera Incorporated has developed Mears Silicon Technology (MST), which increases performance and power efficiency in semiconductor transistors. MST can be implemented using equipment already deployed in semiconductor manufacturing facilities and is complementary to other nano-scaling technologies already in the semiconductor industry roadmap. More information can be found at www.atomera.com