Atomera Announces Breakthrough Semiconductor Performance Improvement

Atomera, working with its partner foundry, has demonstrated a breakthrough performance improvement of up to a 50% reduction in channel on-resistance on 5V analog transistors. The semiconductor industry has been struggling for many years to find ways to improve this key metric and now Atomera’s new SP technique has the effect of unleashing MST to deliver this performance improvement. This new SP technique was achieved through a combination of quantum confinement and dopant profile engineering only made possible by MST. The MST SP breakthrough has applications beyond 5V analog to many other silicon devices, including planar CMOS devices.

“Many semiconductor makers continue to look for ‘More than Moore’ advancements like MST to help them with performance in critical industry products like 5V switches,” said Scott Bibaud, Atomera’s President and CEO. “Our latest MST SP technique provides a breakthrough improvement that is directly applicable to more than a third of our current customers’ applications. We believe that MST SP can also improve many other product areas and will be a key ingredient in high performance electronic devices of the future.”

Many power management integrated circuits and other BCD (Bipolar-CMOS-DMOS) mixed signal products use 5V transistors as switches. The key to a good switch is low loss (on-resistance) so that power is not wasted in the switch, and good isolation so that the switch is not affected by voltage swings in the signal path (breakdown voltage). The Industry standard metric for switch performance is the on-resistance at a given breakdown voltage, depending on the switch application.

The two key features of Atomera’s MST SP technology are improved carrier mobility, which lowers on-resistance, and dopant profile engineering, which can provide better control of short channel effects. By harnessing both these features, Atomera’s MST SP has re-engineered the key 5V NMOS switch to provide up to 50% reduction in specific on-resistance without compromising the breakdown voltage or other key device characteristics. The improvement has been achieved through the combination of mobility improvement and doping profile engineering, which together enable shrinkage of the cell width.

About MST

Mears Silicon Technology is a patented, quantum-engineered material which can enhance transistors to deliver significantly better performance in today’s electronics. MST is an ultra-thin film of reengineered semiconductor that incorporates layers of non-semiconductor material. This engineered silicon lattice has unique electrical properties which address several key device engineering challenges the industry currently faces as it seeks to reduce costs and lower power consumption. That means consumer electronics, such as mobile phones can have longer battery life, IOT devices can be made smaller, and cloud computing will become even more powerful.

Manufacturers can address their yield, power and performance challenges at a fraction of the cost of alternative approaches. Atomera breathe new life into semiconductor fabs by providing up to a full node of performance benefits to existing fab processes empowering competitive new product designs in existing fabs. Atomera’s patented material technology enables more efficient and better controlled current flow, leading to dramatic improvements in device performance and power efficiency.

About Atomera

Atomera Incorporated has developed Mears Silicon Technology (MST), which increases performance and power efficiency in semiconductor transistors. MST can be implemented using equipment already deployed in semiconductor manufacturing facilities and is complementary to other nano-scaling technologies in the semiconductor industry roadmap. www.atomera.com

Safe Harbor

This press release contains forward­looking statements concerning Atomera Incorporated, including statements regarding the prospects for the semiconductor industry generally and the ability of our MST and MST SP technologies to significantly improve semiconductor performance. Those forward­looking statements involve known and unknown risks, uncertainties and other factors that could cause actual results to differ materially. Among those factors are: (1) the risk that we may not be able to consistently replicate the performance improvements represented by our MST SP technology and, even if we can, that the market will be slow to accept our MST SP technology, (2) the fact that, to date, we have not engaged in a test demonstration or licensing arrangements with customers or potential customers concerning our MST SP; (3) the fact that, to date, we have only recognized minimal engineering services and licensing revenues and we have not yet commenced principal revenue producing operations or entered into a definitive royalty-based manufacturing and distribution license agreement with regard to our MST technology, thus subjecting us to all of the risks inherent in an early-stage enterprise; (4) risks related to our ability to advance the licensing arrangements with our initial integration licensees, Asahi Kasei Microdevices and STM Microelectronics, to royalty-based manufacturing and distribution licenses or our ability to add other licensees; (5) risks related to our ability to raise sufficient capital, as and when needed, to pursue the further development, licensing and commercialization of our MST technology; (6) our ability to protect our proprietary technology, trade secrets and know­how and (7) those other risks disclosed in the section “Risk Factors” included in our Annual Report on Form 10-K for the year ended December 31, 2018 filed with the SEC on March 11, 2019. We caution readers not to place undue reliance on any forward-looking statements. We do not undertake, and specifically disclaim any obligation, to update or revise such statements to reflect new circumstances or unanticipated events as they occur.

Press Contact:

Green Flash Media
Jeremy Hyatt
press@atomera.com